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Staff Engineer, Analog
Location: Bangalore
Key Responsibilities
Developing low-power, high-performance analog circuits, including OpAmp, Comparators, Bandgap References, LDOs, Capless LDO, ADCs, DACs, PLL, DLL, Switching Regulator, High Speed IOs, DDR in advanced process nodes.
Defining circuit implementation architecture based on specifications, creating transistor-level designs, and collaborating with analog layout designers for optimization.
Creating and maintaining documentation for designs, including specifications, test plans, usage guidelines, and limitations.
Collaborating with system architects, the analog design team, and the DV (Design Verification) team for DV modeling and digital top verification.
Mentoring junior designers and sharing best practices to enhance design performance and productivity.
Requirements:
B. Tech /BE/ME/M Tech in Electronics/Electrical Engineering or related fields with 5+ years of relevant hands-on experience.
Strong experience in analog and mixed-signal circuit design and/or architecture. Experience with advanced process/FinFET is a plus.
Understanding of device basics and physics, with an understanding of the following:
High speed Driver and Receiver designs, PLL design with solid system understanding
Hands-on experience of Sub block design of Current mirrors, bandgap reference, Opamp, amplifiers with small-signal analysis of several topologies.
Experience in ADC/DAC/Regulator or High Speed SerDes circuit design
Good knowledge of devices, circuits, and EDA tools (schematic, layout, simulator, RC extraction, etc.), considering trade-offs among performance, power consumption, die area, and reliability.
Basic knowledge of the following layouts: antenna checks, antenna failure, latchup issues, ESD constraints, and layout rules, ERC related checks, matching, cross talk, coupling, shielding, guard ring usage, LEF generation, .lib characterization, extraction setup, DRC LVS runs switch knowledge, IR drop requirements, EM issues, parasitic matching, parasitic reduction techniques, and static and dynamic IR analysis
Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals.
Excellent written and verbal communication skills.
Senior Analog Engineer
Location: Bangalore
The Role
This job opening is for a circuit designer in a team responsible for analog and mixed signal IPs . This team owns a wide variety of key IP in Analog/Mixed-Signal domains catering to High Performance products. With a good mix of experienced designers and recent college graduates,, this team offers a very competitive atmosphere with excellent scope to learn and improve.Responsibilities
High Speed IOs, Power Management, Clocking
Requirements
· Qualification: BTech/MTech
· Skills/Experience: 1+ years
· Knowledge of CMOS processes and issues in deep submicron process technologies.
· CMOS circuit design and layout methodology & flow.
· Basic understanding of analog/mixed signal circuitry include Linear Amplifiers, Drivers, Low-dropout regulators, Charge Pump- Regulators, Band gap and Buck/Boost converters, references, comparators,
· Familiarity with basic ESD concepts is an advantage.
· Experience on one or more domains includes High speed serial/parallel data links (multi Gb/s), PHY circuits, transceivers, PLLs, Clock and Data Recovery circuits, power management, IOs.
· Ability to execute assigned circuit design tasks with best product quality and efficiency.
Good written and verbal communication skills in interactions with internal development teams
Senior Design Verification Engineer
Location: Bangalore
Key Responsibilities
Work closely with design team to review the design spec and define/participate detailed testplan Strategy and verification plan
Develop testbench at SOC level for complex ASIC System-On-Chips
Develop and maintain verification environment in UVM
Implementation & verification including Scan, JTAG related logic.
Develop and improve the verification flow and methodology
Maintain regression and debug test failures with designers
Requirements:
B. Tech /BE/ME/M Tech in Computer Science, Electronics/Electrical Engineering or related fields with 2 - 10 years of relevant hands-on experience.
Hands-on experience on using Verilog, System Verilog and UVM (Universal Verification Methodology)
Experience in Unit and SoC Verification, JTAG insertion. Deep understanding of modern verification concepts.
Good scripting skills in languages such as Perl, Tcl, or Python.
Programming skills in System Verilog, C, C++
Working knowledge of RTL coding in Verilog, Synthesis & STA
Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals.
Excellent written and verbal communication skills.
Senior Physical Design Engineer
Location: Bangalore (onsite)
Key Responsibilities
Physical Design Engineer with strong RTL2GDSii Skills.
Includes Logic Synthesis, Floor-planning, Place and Route, Timing Analysis, Convergence, IR/EM analysis, Formal verification, VC-LP, DRC/LVS clean-up.
Requirements
B. Tech /BE/ME/M Tech in Electronics/Electrical Engineering or related fields with 2 - 10 years of relevant hands-on experience.
Hands on experience in P&R, power planning, floor planning, clock tree building, congestion analysis for complex multi power domain designs
The ideal candidate should have thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate with all members of the technical staff, both analog and digital, regarding overall project development progress and status
Good understanding of IR & power analysis and hands on experience in using related tools/flows
Solid understanding of Verilog, TCL and Perl/Python/XML programming languages
Solid track record of releasing complex ICs to market
Ability to clearly articulate issues, challenges, and concerns to all levels of management
Must have good written and verbal cross-functional communication skills